In recent years, wireless devices using broadband millimeter-waves (30 GHz-300 GHz) have been utilized in increasingly wider applications. Wireless technologies using millimeter-waves have been expected to be applied, particularly, to wireless communications of high definition images, and high-speed wireless data communications in a Gigabit class.
Also, millimeter-wave WPAN (Wireless Personal Area Network) has been expected as a high-speed wireless communication network. The millimeter-wave WPAN, which utilizes the directivity of an antenna, assumes a line-of-sight (LOS) communication which involves relatively little multipath, and a non-line-of-sight (NLOS) communication which involves relatively much multipath.
IEEE802.15.3c, which establishes the standard for millimeter-wave WPAN, contemplates the application of the former LOS communication to ultra-high speed download. In this application, a transmission is performed with a single carrier (single carrier modulation) using, for example, a simple binary modulation, or a quaternary modulation such as QPSK (Quadrature Phase Shift Keying) or the like, to limit power consumption, and it is expected to enable battery-driven operations at a downloading destination.
Also, IEEE802.15.3c contemplates an application of the latter NLOS communication to a uncompressed video streaming and the like, where it is envisaged that communication can still be available even if a person goes across a transmission path into an NLOS environment. In this application, it is expected that high multipath immunity can be achieved by performing a transmission with multiple carriers (multi-carrier modulation), for example, using OFDM (Orthogonal Frequency Division Multiplexing) or the like as secondary modulation.
In this regard, a wireless LAN (2.4 GHz/5 GHz band) using a microwave band at low frequencies expects diffractive and reflective radio waves with rich multi-paths, as compared with millimeter-wave bands, so that there is no thought that the modulation scheme can be switched in accordance with the LOS environment and NLOS environment. However, in some cases, one modulation scheme is selected from BPSK (Binary Phase Shift Keying), QPSK, 16QAM (Quadrature Amplitude Modulation) or 64QAM in accordance with a propagation environment.
In a wireless device applied to applications as mentioned above, a power amplifier equipped in a transmitter within the wireless device is a key technology. While compound semiconductors have been employed for conventional power amplifiers, developments have been in progress for CMOS (Complementary Metal Oxide Semiconductor) based power amplifiers which can operate even in millimeter-wave bands, with the aid of the evolution in miniaturization of silicon semiconductors which are suitable for mass-production, and these CMOS can realize a reduction in cost.
In Non-Patent Document 1, 2 dBm of output power has been generated in a power amplifier for a 60-GHz band using CMOS of 130-nm technology.
However, challenges remain unsolved in power amplifiers mainly used in a front end of a transmitter for increasing the output.
For example, assume that n-channel MOS (nMOS) formed in a CMOS process is used in a power amplifier.
In a power amplifier, as nMOS is increasingly miniaturized in relation to the trend to higher frequencies, a gate oxide film of nMOS must be reduced in thickness, so that the breakdown voltage becomes lower, and a lower supply voltage must be applied thereto.
On the other hand, in a power amplifier of a multi-stage amplifier configuration, a large voltage amplitude or current amplitude must be taken in an amplifier at the last stage in order to increase the output. In a power amplifier, the current does not decrease so much even if the miniaturization of nMOS has progressed, but since the supply voltage must be reduced as mentioned above, a sufficient voltage amplitude cannot be ensured.
In Non-Patent Document 2, 9.3 dBm of output power has been generated in a power amplifier for a 60-GHz band using CMOS of 90-nm technologies.
However, in Non-Patent Document 2, the supply voltage exceeds a generally used supply voltage (1.0-1.2 V), and no consideration is given to reliability which is required in practice use.
Reliability which is problematic in the power amplifier is determined mainly by deterioration in hot carriers of MOS transistors. Hot carrier deterioration refers to a phenomenon in which high-energy carriers accelerated by a high electric field within a channel are trapped by a gate oxide film to cause a change in threshold voltage and transconductance. The degree of hot carrier deterioration can be monitored by the substrate current (Isub) of a MOS transistor.
According to Patent Document 1, accumulation Age of hot carrier deterioration of MOS transistors is represented by the following Equation (1). In this regard, the inverse of Equation (1) is a normalized lifetime of the MOS transistor. Also, Equations (2)-(4) are equations used in calculation of Equation (1).
                              [                      Equation            ⁢                                                  ⁢            1                    ]                ⁢                                                                                      Age        =                  ∫                                    1                              W                ·                H                                      ⁢                                                            I                  sub                                ⁡                                  (                                                            I                      sub                                                              I                      d                                                        )                                                            m                -                1                                      ⁢                          ⅆ              t                                                          (        1        )                                          [                      Equation            ⁢                                                  ⁢            2                    ]                ⁢                                                                                                I          sub                =                              Ai            Bi                    ·                      (                                          V                d                            -                              V                sat                                      )                    ·                      I            d                    ·                      exp            ⁡                          (                              -                                                      Bi                    ·                    lc                                                                              V                      d                                        -                                          V                      sat                                                                                  )                                                          (        2        )                                          [                      Equation            ⁢                                                  ⁢            3                    ]                ⁢                                                                                                V          sat                =                                            E              crti                        ⁢                          L              ⁡                              (                                                      V                                          gs                      -                                                        ⁢                                      V                    th                                                  )                                                                                        E                crti                            ⁢              L                        +                          (                                                V                  gs                                -                                  V                  th                                            )                                                          (        3        )                                          [                      Equation            ⁢                                                  ⁢            4                    ]                ⁢                                                                                      lc        =                                                            ɛ                si                            ⁢                              T                ox                            ⁢                              X                j                                                    ɛ                              ox                ⁢                                                                                                                          (        4        )            
Here, H is a constant, W is a gate width, Vd is a drain voltage, Id is a drain current, Vgs is a gate-source voltage, and Vth is a threshold voltage. Also, m is a coefficient related to impact ionization and interface level generation, and is approximately three. Also, Ai and Bi are constants, Ecrti is a critical electric field for a saturation speed, L is a channel length, ∈si, ∈ox are dielectric constants of a silicon substrate and a gate oxide film, respectively, Tox is the thickness of the gate oxide film, and Xj is a drain junction depth. It should be noted that Equation (1) can also be applied to an RF state in which an RF (Radio Frequency) signal is applied, and to a DC state in which DC (direct current) is applied.
In a miniature MOS transistor which has a high electric field strength in the channel, the impact ionization is more likely to occur, so that the hot carrier deterioration constitutes a particularly grave problem. In particular, in a power amplifier which is required to amplify a voltage amplitude, consideration must be taken not only to just a supply voltage but also to the allowed voltage amplitude from a view point of reliability.
To avoid this problem, an approach called “multi-oxide” is applied to power amplifiers. Multi-oxide is an approach that uses a miniature (short gate length) MOS transistor for amplifiers at the first and subsequent stages that involve low voltage amplitude of signal, and that uses a MOS transistor having a long gate and a thick gate oxide film for an amplifier at the last stage that involves a large voltage amplitude. A long-gate MOS transistor, though exhibiting low performance with respect to gain, efficiency and the like, has a high supply voltage or breakdown, and can therefore contribute to the reliability that is required for the power amplifier.
However, the multi oxide approach can be used in micro-wave bands, but not in millimeter-wave bands.
FIG. 1 shows the relationship between the gate length (generation) and a maximum oscillation frequency and a supply voltage of a MOS transistor formed in a CMOS process, created on the basis of Non-Patent Document 3, Non-Patent Document 4 and the like (partially including estimation).
For example, assuming that the operation frequency of a power amplifier is 60 GHz, a maximum oscillation frequency (fmax) approximately three times higher is required in an analog circuit, so that a CMOS transistor is used with a gate length of 90 nm and fmax of approximately 200 GHz.
In this event, 1 V, for example, is used as a supply voltage for the power amplifier. However, since an amplifier at the last stage is applied with a voltage approximately twice as high as the supply voltage, a CMOS transistor should be employed with a gate length of at least 240 nm which corresponds to a supply voltage of at least approximately 2 V. However, the fmax of a CMOS transistor having a gate length of 240 nm is merely as low as approximately 40 GHz.
Specifically, FIG. 1 shows that when the operation frequency of the power amplifier is 60 GHz, the gain becomes 0 dB or less, so that a CMOS transistor having a gate length of 240 nm cannot be applied to the amplifier at the last stage.
In this way, the multi-oxide approach is effective for CMOS transistors which have a gate length of approximately 180 nm and fmax of 30 GHz (operation frequency is 10 GHz or lower).
In this regard, similar MOS transistors having a long gate and a thick gate oxide film are applied even for use in the output section of a digital circuit. According to Non-Patent Document 5, it has been pointed out that a critical supply voltage is 1.8 V (180 nm in gate length) when such a MOS transistor is used. This indication also corresponds to an analog circuit.
As described above, the multi-oxide approach cannot be applied to microwave bands at frequencies of approximately 10 GHz or higher and to millimeter-wave (>30 GHz) bands at frequencies higher than microwave bands.
Accordingly, a power amplifier which operates at the aforementioned frequency using a miniature MOS transistor, has a problem of establishing compatibility between an ensured reliability caused by the hot carrier deterioration of the MOS transistor and an increase in the output.
Also, as previously described, it is desired that millimeter-wave bands support both single-carrier modulation and multi-carrier modulation. As well, as previously described, CMOS capable of operating in millimeter-wave bands is preferably used to obtain a lower cost and higher frequencies of a power amplifier. However, in the power amplifier, an increase in output, linearity, and efficiency becomes difficult due to an increasingly progressed miniaturization of CMOS in relation to the trend to higher frequencies, and in relation to a resulting reduction in the supply voltage which can be applied to the power amplifier. Also, in the power amplifier, a large signal amplitude is not permitted due to limitations from the viewpoint of reliability such as hot carrier deterioration and the like.
Accordingly, the power amplifiers which operate at the aforementioned frequency using miniature MOS transistors have challenges in supporting both the aforementioned modulation schemes and increasing the output, linearity, and efficiency under such constraints.    [Patent Document 1] JP-2005-259777-A    [Non-Patent Document 1] C. H. Doan et al., “Millimeter-wave CMOS Design,” IEEE Journal of Solid-State Circuits, Vol. 40, pp. 144-155, January 2005.    [Non-Patent Document 2] Terry Yao, et al., “Algorithmic Design of CMOS LNAs and PAs for 60-GHz Radio,” IEEE J. Solid-State Circuits, vol. 42, pp. 1044-1057, May 2007.    [Non-Patent Document 3] Herbert S. Bennett et al., “Device and Technology Evolution for Si-Based RF Integrated Circuits,” IEEE Transactions on Electron Devices, pp. 1235-1258, Vol. 52, No. 7, July 2005.    [Non-Patent Document 4] The International Technology Roadmap for Semiconductors: 2005 (ITRS2005).    [Non-Patent Document 5] Klaas Bult, “Analog Broadband Communication Circuits in Pure Digital Deep Sub-Micron CMOS,” IEEE International Solid-State Circuit Conference, Digest, pp. 76-77, February, 1999.